3. Ku Band Upconverter

Written By: Tristan Voon

Component Introduction and Principals

Image

The primary purpose of the Ku band upconverter is to convert the incoming intermediate frequency (IF) from the Link S/X radio into the appropriate Ku Band Frequency, and boost it to a power level suitable for transmission.

The upconversion process happens primarily in a mixer which mixes the IF with a second Signal, termed the Local Oscillator (LO) signal. Mathematically, this process occurs as a multiplication between IF and LO signals, which produces two frequencies at f(LO) + f(IF) and |f(LO) - f(IF)|. In an upconversion process, the former is the desired signal, which can then be amplified to create the desired signal to be transmitted.

In real world mixers, the isolation between the IF/LO ports and the output Radio Frequency (RF Port) is not perfect, and there will be some leakage of the LO signal expected through to the RF side. Along with LO leakage, some harmonics are generated due to the non linearity of the mixer. In general, these should be filtered out through the use of a bandpass filter to prevent wastage of amplifier power and the transmission of spurious signals.

Component Requirements

The requirements for the upconverter are cascaded down from the overall radio subsystem requirements. In general, they can be summarised into three main themes:

  1. The need to convert the IF into the correct frequency and power level
  2. The need to minimise spurious emissions
  3. The need to preserve the RF chain from damage due to external signals or power reflections

In particular, minimising spurious emissions helps us ensure that we do not inadvertently cause interference to users in other portions of the spectrum, as well as helps us save amplifier power by amplifying only useful signals.

The RF chain faces potential degradation from externally radiated signals which may be picked up by the antenna. Impedance mismatches between the antenna and any upstream components may also cause power to be reflected into the amplifier chain. Requirement 3 thus helps us maximise the lifetime of the subsystem

Upconverter Architecture and Block Diagram

The key components of the upconverter are shown below, along with the estimated frequencies and power levels are shown below:

The upconversion process starts with mixing the incoming IF from the Link S/X radio with the LO signal. In general, the LO signal power must be sufficiently high to drive the mixer and ensure a proper mixing. In this case, a mixer with an integrated LO buffer (amplifier is used), removing the need for separate preamplification.

The resultant RF signal is passed through a bandpass filter, which allows the 13.95 GHz frequency but rejects the LO bleedthrough and any harmonics that may be present.

The filtered signal is then passed through a Low Noise Preamplifier, which boosts the signal (with minimal distortion) to a level that the Power Amplifier (PA) can accept.

The PA then amplifies the RF signal to the design power, where it is passed through an isolator, which is a passive ferromagnetic component which allows the RF signal to flow through from the RF chain into the radiator, but blocks RF power from flowing in the reverse direction.

Upconverter PCB and Design Choices

To integrate the upconverter chain into the satellite in a space efficient manner, the components were designed onto a PCB. The upconverter PCB conforms to the PC104 standard, which provides mounting holes for the PCB to be integrated into the electronic stackup within the cubesatellite bus. In general, the PCB design was subject to several considerations, which resulted in tradeoffs having to be made. These factors were namely:

  1. Thermal management considerations
  2. Ease of component layout
  3. Manufacturing cost and difficulty
  4. Mechanical stability
  5. Signal Integrity

In designing the PCB board, several key design choices were identified that would influence the above considerations, and a design matrix was constructed to make choices over which approach should be adopted:


The first of these design choices was the mounting of the power amplifier. The PA requires special consideration due to its extremely high heat output during operation - roughly 27W of waste heat, making it the highest heat emitter in the entire satellite bus. This meant that thermal considerations dominated for this particular component. While integrating it into the PCB like what was done with other components was possible, this would result in less flexibility in terms of designing thermal management solutions for the PA. A decision was made to leave the PA as a connectorized module, and to power it and run signals to it separately. This would open up different thermal management solutions, such as mounting the PA to the frame and utilising the frame as a heat sink/radiator.
The next design consideration was the usage of a 2 layer or 4 layer PCB board. The key trade off is that of cost, and performance + design flexibility. A 2 layer board would require that all the relevant power, signal, and ground features be routed either on the top or behind of the board, whereas a 4 layer board opens up the possibility of routing some features in the middle two layers of copper, expanding design flexibility. A 4 layer board also increases mechanical stability due as the board would be thicker, allowing it to withstand launch loads. Cost however rises with a 4 layer board, due to increased complexities in manufacturing. In this case, the complexity of the board design, combined with the need for many features, led us to select a 4 layered board which is is expected to make routing far more flexibility

The last design choice to be made is the material used for the dielectric. The dielectric is the material that separates two planes of copper. In particular, for signals involving high frequency, the choice of dielectric is important as the signals attenuate very quickly as the electromagnetic wave propagates through the material. Choosing a low loss dielectric therefore allows the preservation of signal integrity. For high frequency applications, the stability of the dielectric directly affects the quality of the impedance match, which the rogers materials provides. Costs can be significant here as a high quality dielectric (the rogers series) can cost up to 10x more per unit area. To balance between the need for cost and performance, a hybrid approach was adopted, which uses the rogers materials for performance sensitive areas (namely between the top layer and the ground plane) and FR4 for the remainder of the board

##

Upconverter Design Progress

Unlike most electronics design projects, special care has to go into the design of the upconverter. The key difference lies in the high frequency signals that characterise the Ku Band region. In this frequency band, return paths follow the path of least impedance (the sum of the real and imaginary paths), meaning they do not necessarily flow through the PCB traces, but through ‘indirect paths’ such as planes. Therefore, care has to be taken in routing these high frequency lines, including carefully planning their return paths. For instance, the ground plane over which the high frequency signal travels should not have any discontinuities.

Beyond return paths, careful attention is paid to the impedance matching between different components. Most RF components are designed for a characteristic 50 ohm impedance - which must be matched to maximise power transfer between components and prevent the formation of harmful signal reflections. The impedance of the traces on the PCB are primarily dependent on the width of the traces relative to the thickness of the dielectric and the frequency of the signal which is being transmitted. In many cases, the surface mount components have pins of different widths, and appropriate joining must occur to prevent discontinuities in impedance from forming.


Being the most complex component to integrate, the Phase Locked Loop IC was used as the starting point for the design. An evaluation board provided by the manufacturer (Texas Instruments) was used as a reference for the design, with the other components in the RF chain being implemented as necessary. The PCB being designed is a 4 layer PCB, with a Rogers dielectric on the top layer followed by 2 layers of FR4. It follows a Signal, Ground, Power, Signal configuration. High frequency signals are routed on the top layer, which allows the return current to flow on the ground plane. The board is further divided into two zones, with one zone being an impedance controlled zone for high frequency signals, and the rest of the board being used for low frequency functions such as low speed control signals, and power conditioning.

Connectors are placed around the board as required. RF connections are provided through SMA ports, with the IF Input and RF outputs being the main RF connections.Connectors for the LO signals available to facilitate diagnostics. Power and control is provided through the use of a molex picoblade connector, which previous experience has found to be suitable for use in space applications. The board accepts regulated power at 3.3V for digital logic, and 18V* (TBC) for power application. On board regulation is done to produce a 4V supply which drives the LNA , and a 15V supply, which is accessible via another picoblade connector to supply the PA module. A SPI connection is also provided, as the PLL chip requires writing a bitstream to set the correct frequency whenever it is booted up.

Key Challenges and Future Plans

Currently, a few main challenges are expected. The first is the need to maintain signal integrity across the high frequency signals. This is expected to be a challenging process, which requires deep expertise and experience. Some technical assistance is available from DSO to assist in this process, and assistance may be sought from them to validate the design of the board once sufficient progress has been made.

The next challenge is the procurement of certain components. For instance, the quotes given by the supplier for the 100 MHz oscillator needed to drive the PLL have been wildly out of budget. Some degree of reliability and ruggedness will be needed for the electronic components as they will need to survive in the harsh environment of space. Finding a balance between ruggedised components and costs continues to be a work in progress.

The third challenge encountered will be thermal management. As discussed, thermal considerations will be important due to the heat output of the PA. In our case, due to the mission CONOPS, it is not expected that the PA will have to run continuously for a long duration of time. The radio subteam will work with the mechanical subteam over the coming months to conduct more in depth analysis of the thermal loading expected and determine an appropriate thermal management plan for the upconverter and PA.


Copyright © 2025-2026 Galassia-5 Satellite Programme